IBM xSeries 440 POST/BIOS Flash Disk Version 1.10 Installation README File CONTENTS ________ 1.0 Overview 2.0 Change History 3.0 Installation and Setup Instructions 4.0 Configuration Information 5.0 Unattended Mode 6.0 Web Sites and Support Phone Number 7.0 Trademarks and Notices 8.0 Disclaimer 1.0 Overview 1.1 This README file contains the latest information about installing the IBM xSeries 440 POST/BIOS. 1.2 Limitations - NA 1.3 Enhancements - NA 1.4 Level of Recommendations and Prerequisites for the Update: - Upgrading to V1.09 is required for support of the Intel Xeon D1 stepping processor. - Upgrading to V1.08 is required to prevent intermittent machine checks associated with certain adapters configured in PCI slots 1 and 2. - Upgrading to V1.03 is required for proper operation of USB Legacy support for all Operating Systems. - Upgrading to V1.03 is required for proper operation of all operating systems that perform a portion of their loading using real mode interrupts. - Upgrading to V1.03 is required for proper operation of all operating systems when making PCI Configuration register accesses when two CECs are populated in the system. - Upgrading to V1.03 is required for maximum performance of the XceL4(tm) Server Accelerator Cache(s). - Upgrading to V1.03 is required for support of the Intel Xeon processor. - Upgrading to V1.02 is required to prevent intermittent machine checks and subsequent upper CEC holdoff conditions seen during POST/BIOS execution when power cycling the system. - Upgrading to V1.01 is required to install and boot Novell Netware 6 and is required for all other operating systems which use APIC interrupts. Upgrading to V1.01 is required to properly synchronize the POST/BIOS with the ASM Adapter during power cycle testing and is recommended for normal operation. - See the list of changes for information to determine whether or not you are affected by the enhancements and fixes. 1.5 Dependencies 2.0 Change History V1.10 - June 24, 2003 - Fix for SCO Unixware 7.1.3, Native I/O Machine check during install and run time, addresses PHOLD condition on BUS-09 V1.09 - April 21, 2003 ---------------------- - Added support for the Intel Xeon processor C1 stepping. V1.08 - January 21, 2003 ------------------------ - Fix to avoid potential machine check associated with heavy DMA traffic from add-in adapters positioned in slots 1 and 2. - Fix to resolve intermittent POST failures configuring some add-in PCIX adapters. - Added code to attempt recovery in the event an upper SMP Expansion Module does not respond to an initial configuration query. V1.07 - November 5, 2002 ------------------------ - Fix for remote console after booting OS. - Changes to allow Xeon processor C1 step to be properly indentified within SMBIOS structures. - Changes for CMOS utility and Flash utility to support enhanced functionality. V1.06 - September 17, 2002 -------------------------- - Fix to avoid a potential live-lock condition on the processor bus experienced under heavy database loading. - Changes to enable Bus Parking for Xeon Processor B0 step to correct a processor errata. - Updated the Intel Microcode Patches for the Xeon and Xeon MP processors to new levels. V1.05 - August 2, 2002 ---------------------- - Added in F12 network boot key support from the BIOS logo splash screen. - Fixed Wake-On-Lan failures when using Remote Deployment Manager and the planar Broadcom and/or Intel 1000 XT cards. V1.04 - July 20, 2002 ---------------------- - Changes to the Setup defaults: PXE ROM enabled by default, and boot order for alternate boot sequence to have network as the first boot device. - Added Wake-On-Lan support for planar PCI slots. - Changed Broadcom PXE ROM to v 2.2.8 to support multiple Wake-On-Lan attempts after trying to PXE boot. - Added support for the Intel Xeon processor C1 stepping. - Updated the Intel Microcode Patch for the Xeon MP processor to the new Intel production level. V1.03 - April 29, 2002 ---------------------- - Fix to USB Legacy support for Novell and Windows 2000 to support new keyboard scan codes. - Fix to USB Legacy support to remove an interaction with the ASM Adapter. - Fix to USB Legacy support to remove support for hot add of USB devices during/after POST. - Fix to add the USB Legacy line item into Setup to allow the user to manually disable USB Legacy support. - Fix to prevent PCI Configuration accesses from being translated as normal IO accesses by the chipset when two CECs are installed. - Fix to prevent Real Mode PCI interrupts from being assigned values above 15. - Change to set the XceL4(tm) Server Accelerator Cache to optimal settings for maximum system performance. - Changes to SMBIOS to remove "unpopulated" entries for entities on the second CEC if the card is not installed. - Added support for the Intel Xeon processor B0 stepping. V1.02 - April 24, 2002 ---------------------- - Resolved intermittent machine check and subsequent upper CEC holdoff conditions seen when power cycling the system. V1.01 - April 18, 2002 ---------------------- - Fixed redundant path for APIC base address access which allowed unordered data packets to arrive from multiple sources causing out of order reads/writes to APIC MMIO. - Fixed purging of the ASM Adapter command buffer to purge both buffer queues prior to looking for valid data instead of a single queue purge which caused erroneous holdoff of the upper CEC and subsequent machine checks. V1.00 - March 03, 2002 ---------------------- - Initial release 3.0 Installation and Setup Instructions The procedure to update the POST/BIOS is as follows: 3.1 Insert the "IBM xSeries 440 POST/BIOS Flash Disk" into drive A. 3.2 Start up or restart your IBM xSeries 440 server. 3.3 The system will boot off of the disk and present a window which allows you the option to flash various options. Choose "1 - Update POST/BIOS". 3.4 You will be asked if you would like to move the current POST/BIOS image to the backup ROM location. If you select 'Y', the current code will be flashed in to the backup bank immediately. 3.5 If the current system POST/BIOS supports the Asset Tag feature, you will be asked if you would like to change it. If you select 'Y', you will be able to enter a new number. 3.6 You will then be asked if you would like to save the current code to a disk. If you select 'Y', you need to have a formatted disk already available, or specify a fully qualified path and file name. 3.7 At this point, the image will be loaded from the disk, and you will be asked to choose which language you wish to use during POST and in Setup. If you select a choice other than English, the selected language will be merged into the image. There is also an option to Quit the flash update on this menu. 3.8 After this completes the system will update the flash ROM with the new code. When this is complete you will be prompted to remove the disk and hit return to reboot the system. 3.9 On the reboot immediately following the flash update the user MUST enter the BIOS Setup utility by pressing when prompted. Upon entering the Setup utility the user must select the "Load Default Settings" line item from the main "Configuration/Setup Utility" menu. Select to load the system default settings. The user must now exit the setup utility and select "Yes, save and exit the Setup Utility". The system will automatically reboot. 4.0 Configuration Information 5.0 Unattended Mode 5.1 Steps for unattended mode. 5.1.1 Modify CONFIG.SYS on the Flash Diskette to read: "SHELL=FLASH2.EXE /u /r xx* **" 5.1.2 Reboot the system with the Flash Diskette in Drive A: * Note: "xx" refers to the language support. By default the system will flash the English versions of BIOS and Setup if no language is specified. ** Note: An optional parameter of "/a:" can be added to allow for storing a system asset tag number where "" is replaced with up to a 32 digit string. 6.0 Web Sites and Support Phone Number 6.1 IBM Support Web Site: http://www.pc.ibm.com/support 6.2 IBM Marketing Web Site: http://www.pc.ibm.com/ww/eserver/xseries/ 6.3 If you have any questions about this update, or problems applying the update go to the following Help Center World Telephone Numbers URL: http://www.pc.ibm.com/qtechinfo/YAST-3P2QLY.html. 7.0 Trademarks and Notices 7.1 IBM and the e(logo) are registered trademarks of International Business Machines Corporation. 7.2 U.S. Government Users Restricted Rights - Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corporation. IBM web site pages may contain other proprietary notices and copyright information which should be observed. 8.0 Disclaimer THIS DOCUMENT IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND. IBM DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF FITNESS FOR A PARTICULAR PURPOSE AND MERCHANTABILITY WITH RESPECT TO THE INFORMATION IN THIS DOCUMENT. BY FURNISHING THIS DOCUMENT, IBM GRANTS NO LICENSES TO ANY PATENTS OR COPYRIGHTS.